LEADER 01121nlm0 22003491i 450 001 990009814630403321 005 20140127100128.0 010 $a9780470891179$bonline 035 $a000981463 035 $aFED01000981463 035 $a(Aleph)000981463FED01 035 $a000981463 100 $a20140127d2010----km-y0itay0103----ba 101 0 $aeng 135 $adrnn-008mamaa 200 1 $aCMOS$bRisorsa elettronica$ecircuit design, layout, and simulation$fR. Jacob Baker 205 $a3rd ed. 210 $aPiscataway, N. J.$cWiley-IEEE Press$d2010 225 1 $aIEEE Press series on microelectronic systems 230 $aDocumento elettronico 306 $aPublished Online: 24 MAY 2011 336 $aTesto 337 $aFormato pdf 676 $a621.39732 700 1$aBaker,$bR. Jacob$f<1964- >$0324727 801 0$aIT$bUNINA$gREICAT$2UNIMARC 856 4 $zFull text per gli utenti Federico II$uhttp://onlinelibrary.wiley.com/book/10.1002/9780470891179 901 $aEB 912 $a990009814630403321 961 $aIntegrated circuits$aDesign and construction 996 $aCMOS$9835323 997 $aUNINA